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Author Yalamanchili, Sudhakar.
Title Introductory VHDL : from simulation to synthesis.
Publication Info Upper Saddle River, N.J. : Prentice Hall, 2001.


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 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  DUE 12-06-24
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Descript 401p. + 2 CD-ROMs.
Note Includes 2 CD-ROMS.
ISBN 0130809829
0130899232
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Author Yalamanchili, Sudhakar.
Series Xilinx design series
Subject VHDL (Computer hardware description language)
Descript 401p. + 2 CD-ROMs.
Note Includes 2 CD-ROMS.
ISBN 0130809829
0130899232
Author Yalamanchili, Sudhakar.
Series Xilinx design series
Subject VHDL (Computer hardware description language)
LOCATION SHELVED AT LOAN TYPE STATUS
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  AVAILABLE
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  DUE 12-06-24
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  AVAILABLE

Subject VHDL (Computer hardware description language)
Descript 401p. + 2 CD-ROMs.
Note Includes 2 CD-ROMS.
ISBN 0130809829
0130899232
Persistent link to this item
Click link and copy URL from browser navigation toolbar

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