LEADER 00000nam  2200217 a 4500 
001    0130809829 
007    t  
008    001010s2000    xxu     rb    001   eng   
020    0130809829 
020    0130899232 
040    CURLLC 
050  4 TK 7885.7 Y1 
100 1  Yalamanchili, Sudhakar. 
245 10 Introductory VHDL :|bfrom simulation to synthesis. 
260    Upper Saddle River, N.J. :|bPrentice Hall,|c2001. 
300    401p. +|e2 CD-ROMs. 
440  0 Xilinx design series 
500    Includes 2 CD-ROMS. 
650  0 VHDL (Computer hardware description language) 
LOCATION SHELVED AT LOAN TYPE STATUS
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  AVAILABLE
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  AVAILABLE
 BJL 3rd Floor  TK 7885.7 Y1  8 WEEK LOAN  AVAILABLE